基于stm32f407实现的modbus/tcp

/**
  ******************************************************************************
  * @file    system_stm32f0xx.c
  * @author  MCD Application Team
  * @version V1.2.0
  * @date    01-August-2013
  * @brief   CMSIS Cortex-M0 Device Peripheral Access layer System Source File.
  *          This file contains the system clock configuration for STM32F0xx devices
  *          and is generated by the clock configuration tool  
  *          STM32F0xx_Clock_Configuration_V1.0.0.xls
  *
  * 1.  This file provides two functions and one global variable to be called from 
  *     user application:
  *      - SystemInit（）: Setups the system clock （System clock source PLL Multiplier
  *                      and Divider factors AHB/APBx prescalers and Flash settings）
  *                      depending on the configuration made in the clock xls tool.
  *                      This function is called at startup just after reset and 
  *                      before branch to main program. This call is made inside
  *                      the “startup_stm32f0xx.s“ file.
  *
  *      - SystemCoreClock variable: Contains the core clock （HCLK） it can be used
  *                                  by the user application to setup the SysTick 
  *                                  timer or configure other parameters.
  *
  *      - SystemCoreClockUpdate（）: Updates the variable SystemCoreClock and must
  *                                 be called whenever the core clock is changed
  *                                 during program execution.
  *
  * 2. After each device reset the HSI （8 MHz Range） is used as system clock source.
  *    Then SystemInit（） function is called in “startup_stm32f0xx.s“ file to
  *    configure the system clock before to branch to main program.
  *
  * 3. If the system clock source selected by user fails to startup the SystemInit（）
  *    function will do nothing and HSI still used as system clock source. User can 
  *    add some code to deal with this issue inside the SetSysClock（） function.
  *
  * 4. The default value of HSE crystal is set to 8MHz refer to “HSE_VALUE“ define
  *    in “stm32f0xx.h“ file. When HSE is used as system clock source directly or
  *    through PLL and you are using different crystal you have to adapt the HSE
  *    value to your own configuration.
  *
  * 5. This file configures the system clock as follows:
  *=============================================================================
  *                         System Clock Configuration
  *=============================================================================
  *        System Clock source          | PLL（HSE）
  *-----------------------------------------------------------------------------
  *        SYSCLK                       | 48000000 Hz
  *-----------------------------------------------------------------------------
  *        HCLK                         | 48000000 Hz
  *----------------

 属性            大小     日期    时间   名称
----------- ---------  ---------- -----  ----

     文件      24914  2013-11-07 11:55  stm32f4xx_modbus_lwipLibrariesCMSISCMSIS END USER LICENCE AGREEMENT.pdf

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